CPU BIL variables.

For simplicity we're using the same names for registers in 32 and 64 mode. For example, the A register, has a name rax on both 32-bit and 64-bit processors. However, on the former it is 32-bit (contrary to the name), and on the latter it is 64-bit.

val rbp : Bap.Std.var

base pointer

val rsp : Bap.Std.var

stack pointer

val rsi : Bap.Std.var

source index

val rdi : Bap.Std.var

destination index

val rip : Bap.Std.var

instruction pointer

val rax : Bap.Std.var

accumulator register

val rbx : Bap.Std.var

base register

val rcx : Bap.Std.var

counter register

val rdx : Bap.Std.var

data register

val rflags : Bap.Std.var

RFLAGS register

val gdt : Bap.Std.var

Global Descriptor Table

val ldt : Bap.Std.var

Local Descriptor Table

val fs_base : Bap.Std.var

segment registers let bases

val gs_base : Bap.Std.var
val seg_ss : Bap.Std.var option
val seg_es : Bap.Std.var option
val seg_cs : Bap.Std.var option
val seg_ds : Bap.Std.var option
val seg_fs : Bap.Std.var option
val seg_gs : Bap.Std.var option
val mem : Bap.Std.var


val r : Bap.Std.var array

r8-r15 registers. Due to a legacy issues r.(0) -> r8, r.(1) -> r8, ...

val nums : Bap.Std.var array

Legacy version of the `r` array.

  • deprecated [since 2018-01] use `r` instead
val ymms : Bap.Std.var array

array of YMM registers