package hardcaml_axi

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module Slave_instance : sig ... end
type t
val create : Hardcaml.Scope.t -> log_size_in_bytes:Base.int -> reg_spec:Hardcaml.Reg_spec.t -> int_master:Hardcaml.Signal.t Master_to_slave.t -> t

Create a slave demultiplexer builder object.

val add_slave : t -> Slave_instance.t

Add a slave. Slaves spaces will be created in the order added.

Construct the slave demultiplexer hardware for the given number of interfaces and ensure everything is wired up appropriately.

val with_slave_demultiplexer : Hardcaml.Scope.t -> log_size_in_bytes:Base.int -> reg_spec:Hardcaml.Reg_spec.t -> int_master:Hardcaml.Signal.t Master_to_slave.t -> f:(t -> 'a) -> (Hardcaml.Signal.t Slave_to_master.t, 'a) Slave_with_data.t

Automatically create and complete the slave demultiplexer and pass to f.

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