package hardcaml_of_verilog

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type t =
  1. | String of Base.string
  2. | Int of Base.int
  3. | No_arg
include Sexplib0.Sexpable.S with type t := t
val t_of_sexp : Sexplib0__.Sexp.t -> t
val sexp_of_t : t -> Sexplib0__.Sexp.t
include Ppx_compare_lib.Equal.S with type t := t
val equal : t Base__Ppx_compare_lib.equal
val to_string : t -> Base.string
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