package hardcaml

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Module
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Class
Class type

Parameters

module I : Interface.S
module O : Interface.S

Signature

type nonrec t = (Bits.t Hardcaml__.Import.Ref.t I.t, Bits.t Hardcaml__.Import.Ref.t O.t) t
val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
val create : (?port_checks:Circuit.Port_checks.t -> ?add_phantom_inputs:Hardcaml__.Import.Bool.t -> Circuit.With_interface(I)(O).create -> t) with_create_options Circuit.with_create_options

Create a simulator using the provided Create_fn. The returned simulator ports are coerced to the input and output interface types.

val coerce : t_port_list -> t

Coerce simulator port types to use the provided input and output interfaces.

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