package hardcaml_of_verilog

  1. Overview
  2. Docs

Takes in a Hardcaml circuit and transforms it to a json file that can be read and rendered by netlistsvg.

val convert : ?debug:Base.bool -> Hardcaml.Circuit.t -> Hardcaml_of_verilog__.Yosys_netlist.t
OCaml

Innovation. Community. Security.